1. Field of the Invention
The present invention relates to technology for non-volatile memory.
2. Description of the Related Art
Semiconductor memory has become more popular for use in various electronic devices. For example, non-volatile semiconductor memory is used in cellular telephones, digital cameras, personal digital assistants, mobile computing devices, non-mobile computing devices and other devices. Electrical Erasable Programmable Read Only Memory (EEPROM) and flash memory are among the most popular non-volatile semiconductor memories.
Both EEPROM and flash memory utilize a floating gate that is positioned above and insulated from a channel region in a semiconductor substrate. The floating gate is positioned between the source and drain regions. A control gate is provided over and insulated from the floating gate. The threshold voltage of the transistor is controlled by the amount of charge that is retained on the floating gate. That is, the minimum amount of voltage that must be applied to the control gate before the transistor is turned on to permit conduction between its source and drain is controlled by the level of charge on the floating gate.
When programming an EEPROM or flash memory device, such as a NAND flash memory device, typically a program voltage is applied to the control gate and the bit line is grounded. Electrons from the channel are injected into the floating gate. When electrons accumulate in the floating gate, the floating gate becomes negatively charged and the threshold voltage of the storage element is raised so that the storage element is in a programmed state. More information about programming can be found in U.S. Pat. No. 6,859,397, titled “Source Side Self Boosting Technique for Non-Volatile Memory;” and in U.S. Pat. No. 6,917,542, titled “Detecting Over Programmed Memory;” both patents are incorporated herein by reference in their entirety.
Some EEPROM and flash memory devices have a floating gate that is used to store two ranges of charges and, therefore, the storage element can be programmed/erased between two states (an erased state and a programmed state). Such a flash memory device is sometimes referred to as a binary flash memory device.
A multi-state flash memory device is implemented by identifying multiple distinct allowed/valid programmed threshold voltage ranges separated by forbidden ranges. Each distinct threshold voltage range corresponds to a predetermined value for the set of data bits encoded in the memory device.
In present non-volatile storage devices, such as NAND flash memory devices, temperature variations present various issues in reading and writing data. A memory device is subject to varying temperatures based on the environment in which it is located. For example, some current memory devices are rated for use between −40° C. and +85° C. Devices in industrial, military and even consumer applications may experience significant temperature variations. Temperature affects many transistor parameters, the dominant among which is the threshold voltage. In particular, temperature variations can cause read errors and widen the threshold voltage distributions of the different states of a non-volatile storage element. Currently, temperature variations are compensated for by changing the read/verify voltages applied to a selected word line in a way which accounts for the temperature variation of a selected storage element's threshold voltage. This approach can, at best, address the average shift in the distribution of threshold voltages of a storage element which, for simplicity, are all assumed to be in the same data state. However, an improved technique is needed for further reducing the spread of each state's threshold voltage distribution resulting from changes in temperature.